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86
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ICFP
1997
ACM
15 years 2 months ago
Implementing Bit-addressing with Specialization
General media-processing programs are easily expressed with bitaddressing and variable-sized bit-fields. But the natural implementation of bit-addressing relies on dynamic shift ...
Scott Draves
90
Voted
ARVLSI
2001
IEEE
289views VLSI» more  ARVLSI 2001»
15 years 1 months ago
A High-Performance 64-bit Adder Implemented in Output Prediction Logic
Output Prediction Logic (OPL) is a technique that can be applied to conventional CMOS logic families to obtain considerable speedups. When applied to static CMOS, OPL retains the ...
Sheng Sun, Larry McMurchie, Carl Sechen
FAST
2007
14 years 11 months ago
Nache: Design and Implementation of a Caching Proxy for NFSv4
In this paper, we present Nache, a caching proxy for NFSv4 that enables a consistent cache of a remote NFS server to be maintained and shared across multiple local NFS clients. Na...
Ajay Gulati, Manoj Naik, Renu Tewari
IAJIT
2010
150views more  IAJIT 2010»
14 years 8 months ago
Optimal DSP Based Integer Motion Estimation Implementation for H.264/AVC Baseline Encoder
: The coding gain of the H.264/AVC video encoder mainly comes from the new incorporated prediction tools. However, their enormous computation and ultrahigh memory bandwidth are the...
Imen Werda, Haithem Chaouch, Amine Samet, Mohamed ...
ESANN
2006
14 years 11 months ago
Parallel hardware implementation of a broad class of spiking neurons using serial arithmetic
Abstract. Current digital, directly mapped implementations of spiking neural networks use serial processing and parallel arithmetic. On a standard CPU, this might be the good choic...
Benjamin Schrauwen, Jan M. Van Campenhout