11 search results - page 2 / 3 » A flexible data to L2 cache mapping approach for future mult... |
IEEEPACT
2009
IEEE
14 years 1 months ago
2009
IEEE
—With increasing numbers of cores, future CMPs (Chip Multi-Processors) are likely to have a tiled architecture with a portion of shared L2 cache on each tile and a bankinterleave...
MICRO
2003
IEEE
13 years 11 months ago
2003
IEEE
Wire delays are a major concern for current and forthcoming processors. One approach to attack this problem is to divide the processor into semi-independent units referred to as c...
ASPLOS
2008
ACM
13 years 8 months ago
2008
ACM
Recently, the number of cores on general-purpose processors has been increasing rapidly. Using conventional programming models, it is challenging to effectively exploit these core...
ISCA
2006
IEEE
14 years 11 days ago
2006
IEEE
Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future...
PASTE
2010
ACM
13 years 11 months ago
2010
ACM
Multicore is now the dominant processor trend, and the number of cores is rapidly increasing. The paradigm shift to multicore forces the redesign of the software stack, which incl...