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» A formal executable semantics of Verilog
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92
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CIBSE
2009
ACM
15 years 6 months ago
A two-level formal semantics for the QVT language
Model Driven Engineering (MDE) proposes a software development process in which software is built by constructing one or more models, and transforming these into other models. In t...
Roxana S. Giandini, Claudia Pons, Gabriela P&eacut...
ACSD
2010
IEEE
215views Hardware» more  ACSD 2010»
14 years 9 months ago
A Formal Semantics of Clock Refinement in Imperative Synchronous Languages
The synchronous model of computation divides the execution of a program into an infinite sequence of socalled macro steps, which are further divided into finitely many micro steps....
Mike Gemunde, Jens Brandt, Klaus Schneider
89
Voted
ISORC
2009
IEEE
15 years 6 months ago
Marte CCSL to Execute East-ADL Timing Requirements
In the automotive domain, several loosely-coupled Architecture Description Languages (ADLs) compete to proet of abstract modeling and analysis services on top of the implementatio...
Frédéric Mallet, Marie-Agnès ...
ECOWS
2008
Springer
15 years 1 months ago
Beyond Soundness: On the Semantic Consistency of Executable Process Models
Executable business process models build on the specification of process activities, their implemented business functions (e.g., Web services) and the control flow between these a...
Ingo Weber, Jörg Hoffmann, Jan Mendling
94
Voted
FMCAD
2009
Springer
15 years 3 months ago
Industrial strength refinement checking
This paper discusses a methodology used on an industrial hardware development project to validate various cache-coherence protocol components. The idea is to use a high level model...
Jesse D. Bingham, John Erickson, Gaurav Singh, Fle...