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IPPS
2003
IEEE
15 years 9 months ago
Using Incorrect Speculation to Prefetch Data in a Concurrent Multithreaded Processor
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...
Ying Chen, Resit Sendag, David J. Lilja
HPCA
1998
IEEE
15 years 8 months ago
Performance Study of a Concurrent Multithreaded Processor
The performance of a concurrent multithreaded architectural model, called superthreading 15 , is studied in this paper. It tries to integrate optimizing compilation techniques and...
Jenn-Yuan Tsai, Zhenzhen Jiang, Eric Ness, Pen-Chu...
IPPS
1994
IEEE
15 years 8 months ago
Parallel Evaluation of a Parallel Architecture by Means of Calibrated Emulation
A parallel transputer-based emulator has been developed to evaluate the DDM--ahighlyparallel virtual shared memory architecture. The emulator provides performance results of a har...
Henk L. Muller, Paul W. A. Stallard, David H. D. W...
EURONGI
2006
Springer
15 years 7 months ago
Randomized Self-stabilizing Algorithms for Wireless Sensor Networks
Wireless sensor networks (WSNs) pose challenges not present in classical distributed systems: resource limitations, high failure rates, and ad hoc deployment. The lossy nature of w...
Volker Turau, Christoph Weyer
ISMB
1993
15 years 5 months ago
Protein Sequencing Experiment Planning Using Analogy
Experiment design and execution is a central activity in the natural sciences. The SeqERsystem provides a general architecture for the integration of automated planning techniques...
Brian P. Kettler, Lindley Darden