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DATE
2006
IEEE
123views Hardware» more  DATE 2006»
15 years 11 months ago
Constructing portable compiled instruction-set simulators: an ADL-driven approach
Instruction set simulators are common tools used for the development of new architectures and embedded software among countless other functions. This paper presents a framework th...
Joseph D'Errico, Wei Qin
DATE
2006
IEEE
104views Hardware» more  DATE 2006»
15 years 11 months ago
Equivalence verification of arithmetic datapaths with multiple word-length operands
Abstract: This paper addresses the problem of equivalence verification of RTL descriptions that implement arithmetic computations (add, mult, shift) over bitvectors that have diļ¬...
Namrata Shekhar, Priyank Kalla, Florian Enescu
136
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DATE
2005
IEEE
116views Hardware» more  DATE 2005»
15 years 10 months ago
A Complete Network-On-Chip Emulation Framework
Current Systems-On-Chip (SoC) execute applications that demand extensive parallel processing. Networks-OnChip (NoC) provide a structured way of realizing interconnections on silic...
Nicolas Genko, David Atienza, Giovanni De Micheli,...
ICCAD
2003
IEEE
205views Hardware» more  ICCAD 2003»
15 years 10 months ago
Statistical Timing Analysis for Intra-Die Process Variations with Spatial Correlations
Process variations have become a critical issue in performance verification of high-performance designs. We present a new, statistical timing analysis method that accounts for int...
Aseem Agarwal, David Blaauw, Vladimir Zolotov
ICCAD
1994
IEEE
105views Hardware» more  ICCAD 1994»
15 years 9 months ago
Register assignment through resource classification for ASIP microcode generation
Application Specific Instruction-Set Processors (ASIPs) offer designers the ability for high-speed data and control processing with the added flexibility needed for late design sp...
Clifford Liem, Trevor C. May, Pierre G. Paulin