1013 search results - page 41 / 203 » A hardware implementation of realloc function |
147
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CASES
2005
ACM
15 years 3 months ago
2005
ACM
Code compression is a field where compression ratios between compiler-generated code and subsequent compressed code are highly dependent on decisions made at compile time. Most op...
107
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IPPS
2002
IEEE
15 years 6 months ago
2002
IEEE
This paper presents the implementation, on Virtex FPGAs, of a core generator for arbitrary numeric functions in fixed-point format. The cores use the state-of-theart multipartite...
ISMVL
1993
IEEE
15 years 6 months ago
1993
IEEE
Use of current-mode CMOS circuitsfor implementation of multiple-valued logic (MVL)functions has been considered in a number of recent papers. In this paper, we present an applicat...
122
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FPL
2007
Springer
15 years 8 months ago
2007
Springer
Field-programmable circuits now have a capacity that allows them to accelerate floating-point computing, but are still missing core libraries for it. In particular, there is a ne...
104
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ISCAS
2008
IEEE
15 years 8 months ago
2008
IEEE
— The lack of robust tamper-proofing techniques in security applications has provided attackers the ability to virtually circumvent mathematically strong cryptographic primitive...