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» A hierarchical process execution support for grid computing
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FCCM
2008
IEEE
212views VLSI» more  FCCM 2008»
15 years 8 months ago
Map-reduce as a Programming Model for Custom Computing Machines
The map-reduce model requires users to express their problem in terms of a map function that processes single records in a stream, and a reduce function that merges all mapped out...
Jackson H. C. Yeung, C. C. Tsang, Kuen Hung Tsoi, ...
CASES
2001
ACM
15 years 5 months ago
A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture
The rapid growth of silicon densities has made it feasible to deploy reconfigurable hardware as a highly parallel computing platform. However, in most cases, the application needs...
Girish Venkataramani, Walid A. Najjar, Fadi J. Kur...
DATE
2004
IEEE
139views Hardware» more  DATE 2004»
15 years 5 months ago
Efficient Implementations of Mobile Video Computations on Domain-Specific Reconfigurable Arrays
Mobile video processing as defined in standards like MPEG-4 and H.263 contains a number of timeconsuming computations that cannot be efficiently executed on current hardware archi...
Sami Khawam, Sajid Baloch, Arjun Pai, Imran Ahmed,...
BMCBI
2006
158views more  BMCBI 2006»
15 years 2 months ago
Parallelization of multicategory support vector machines (PMC-SVM) for classifying microarray data
Background: Multicategory Support Vector Machines (MC-SVM) are powerful classification systems with excellent performance in a variety of data classification problems. Since the p...
Chaoyang Zhang, Peng Li, Arun Rajendran, Youping D...
TSE
2008
131views more  TSE 2008»
15 years 1 months ago
Enhancing an Application Server to Support Available Components
Three-tier middleware architecture is commonly used for hosting enterprise-distributed applications. Typically, the application is decomposed into three layers: front end, middle t...
Achmad I. Kistijantoro, Graham Morgan, Santosh K. ...