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DATE
2003
IEEE
103views Hardware» more  DATE 2003»
15 years 5 months ago
Reduced Delay Uncertainty in High Performance Clock Distribution Networks
The design of clock distribution networks in synchronous digital systems presents enormous challenges. Controlling the clock signal delay in the presence of various noise sources,...
Dimitrios Velenis, Marios C. Papaefthymiou, Eby G....
DAC
2007
ACM
16 years 26 days ago
Compact State Machines for High Performance Pattern Matching
Pattern matching is essential to a wide range of applications such as network intrusion detection, virus scanning, etc. Pattern matching algorithms normally rely on state machines...
Piti Piyachon, Yan Luo
ESCIENCE
2007
IEEE
15 years 6 months ago
Binary Data Transfer Performance over High-Latency Networks Using Web Service Attachments
One of the objectives of e-Research is to help scientists to accomplish their research, including scientific experiments, more effectively and efficiently. Web services provide ...
Donglai Zhang, Paul D. Coddington, Andrew L. Wende...
PDCAT
2004
Springer
15 years 5 months ago
GridCrypt: High Performance Symmetric Key Cryptography Using Enterprise Grids
Today’s cryptanalysis on symmetric key cryptography is encouraging the use of larger key sizes and complex algorithms to achieve an unbreakable state. However, this leads an inc...
Agus Setiawan, David Adiutama, Julius Liman, Aksha...
VLSID
1999
IEEE
104views VLSI» more  VLSID 1999»
15 years 4 months ago
Interconnect Optimization Strategies for High-Performance VLSI Designs
Interconnect tuning and repeater insertion are necessary to optimize interconnectdelay, signalperformanceandintegrity, andinterconnectmanufacturability and reliability. Repeater i...
Andrew B. Kahng, Sudhakar Muddu, Egino Sarto