2209 search results - page 23 / 442 » A high performance JPEG2000 architecture |
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IPPS
2000
IEEE
15 years 4 months ago
2000
IEEE
The newly introduced Microprocessor Architecture for Java Computing MAJC supports parallelism in a hierarchy of levels: multiprocessors on chip,vertical micro threading, instruct...
ASPDAC
2005
ACM
15 years 1 months ago
2005
ACM
- The use of synthesizable reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such domain-special cores are being used for their flexibility, po...
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PDP
2009
IEEE
15 years 6 months ago
2009
IEEE
Abstract—Execution of applications on upcoming highperformance computing (HPC) systems introduces a variety of new challenges and amplifies many existing ones. These systems will...
110
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ARC
2006
Springer
15 years 3 months ago
2006
Springer
This paper presents a reconfigurable hardware architecture for Public-key cryptosystems. By changing the connections of coarse grain Carry-Save Adders (CSAs), the datapath provides...
DAC
1994
ACM
15 years 4 months ago
1994
ACM
We describe ASTRX/OBLX, a synthesis system that can size high-performance analog circuit topologies to meet usersupplied linear performance specifications without designer-supplied...