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CODES
2003
IEEE
15 years 7 months ago
A modular simulation framework for architectural exploration of on-chip interconnection networks
Ever increasing complexity and heterogeneity of SoC platforms require diversified on-chip communication schemes beyond the currently omnipresent shared bus architectures. To prev...
Tim Kogel, Malte Doerper, Andreas Wieferink, Raine...
ICCAD
2006
IEEE
177views Hardware» more  ICCAD 2006»
15 years 10 months ago
Fast and accurate transaction level models using result oriented modeling
Efficient communication modeling is a critical task in SoC design and exploration. In particular, fast and accurate communication is needed to predict the performance of a system....
Gunar Schirner, Rainer Dömer
ICC
2007
IEEE
15 years 8 months ago
Multi-MetaRing Protocol: Fairness in Optical Packet Ring Networks
— We focus on Metropolitan Area Networks operating in packet mode and exploiting a single-hop wavelength division multiplexing (WDM) architecture. First, we briefly describe a s...
Andrea Bianco, Davide Cuda, Jorge M. Finochietto, ...
DAC
2000
ACM
16 years 2 months ago
COSY communication IP's
The Esprit/OMI-COSY project defines transaction-levels to set-up the exchange of IP's in separating function from architecture and body-behavior from proprietary interfaces. ...
Erwin A. de Kock, Frédéric Pé...
VLSISP
1998
128views more  VLSISP 1998»
15 years 1 months ago
A Low Power DSP Engine for Wireless Communications
This paper describes the architecture and the performance of a new programmable 16-bit Digital Signal Processor (DSP) engine. It is developed specifically for next generation wire...
Ingrid Verbauwhede, Mihran Touriguian