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ISCAS
2005
IEEE
126views Hardware» more  ISCAS 2005»
15 years 4 months ago
A distributed FIFO scheme for on chip communication
— Interconnect delays are increasingly becoming the dominant source of performance degradation in the nano-meter regime, largely because of disturbances that result from parasiti...
Ray Robert Rydberg III, Jabulani Nyathi, Jos&eacut...
IPPS
2003
IEEE
15 years 4 months ago
A Message Passing Interface Library for Inhomogeneous Coupled Clusters
Clusters of PC containing mostly general purpose hardware have become more and more usable for high performance computing tasks in the past few years. Clustering existing systems ...
Martin Pöppe, Silke Schuch, Thomas Bemmerl
PVM
2007
Springer
15 years 5 months ago
Analysis of Implementation Options for MPI-2 One-Sided
Abstract. The Message Passing Interface provides an interface for onesided communication as part of the MPI-2 standard. The semantics specified by MPI-2 allow for a number of di...
Brian Barrett, Galen M. Shipman, Andrew Lumsdaine
INFOCOM
2009
IEEE
15 years 5 months ago
Minimizing Probing Cost for Detecting Interface Failures: Algorithms and Scalability Analysis
— The automatic detection of failures in IP paths is an essential step for operators to perform diagnosis or for overlays to adapt. We study a scenario where a set of monitors se...
Hung Xuan Nguyen, Renata Teixeira, Patrick Thiran,...
IMC
2010
ACM
14 years 9 months ago
High speed network traffic analysis with commodity multi-core systems
Multi-core systems are the current dominant trend in computer processors. However, kernel network layers often do not fully exploit multi-core architectures. This is due to issues...
Francesco Fusco, Luca Deri