315 search results - page 8 / 63 » A low complexity hardware architecture for motion estimation |
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ICIP
2006
IEEE
16 years 1 months ago
2006
IEEE
The coding efficiency of the H.264/AVC standard enables the transmission of high quality video over bandwidth limited networks. Due to the use of multiple Macroblock (MB) partitio...
VLSISP
2002
14 years 11 months ago
2002
Abstract. This paper presents a reduced-complexity, fixed-point algorithm and efficient real-time VLSI architectures for multiuser channel estimation, one of the core baseband proc...
ISCAS
2008
IEEE
15 years 6 months ago
2008
IEEE
Abstract— A complexity model for context-based adaptive variable length coding (CAVLC) and universal variable length coding (UVLC) in the H.264/AVC decoder is proposed. CAVLC and...
ASAP
2006
IEEE
15 years 1 months ago
2006
IEEE
This paper proposes a novel parallel approach for pipelining of nested multiplexer loops to design high speed decision feedback equalizers (DFEs) based on look-ahead techniques. I...
DATE
1997
IEEE
15 years 3 months ago
1997
IEEE
In this paper a parametrizable architecture of a motion estimator (ME) is presented. The ME is designed as a generic full pixel calculation module which can be adopted for di eren...