109 search results - page 8 / 22 » A low power architecture for embedded perception |
JEC
2006
14 years 9 months ago
2006
We present an overview of the Synchroscalar single-chip, multi-core processor. Through the design of Synchroscalar, we find that high energy efficiency and low complexity can be a...
ICCD
2002
IEEE
15 years 6 months ago
2002
IEEE
We present a low cost wireless microsensor node architecture for distributed computation and sensing in massively distributed embedded systems. Our design focuses on the developme...
DATE
2007
IEEE
15 years 3 months ago
2007
IEEE
Device scaling in new and future technologies brings along severe increase in the soft error rate of circuits, for combinational and sequential logic. Although potential solutions...
DAC
2007
ACM
15 years 10 months ago
2007
ACM
DPM (Dynamic Power Management) is an effective technique for reducing the energy consumption of embedded systems that is based on migrating to a low power state when possible. Whi...
ASPDAC
2007
ACM
15 years 1 months ago
2007
ACM
- This paper presents a real time programmable irregular Low Density Parity Check (LDPC) Encoder as specified in the IEEE P802.16E/D7 standard. The encoder is programmable for fram...