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GLVLSI
2003
IEEE
239views VLSI» more  GLVLSI 2003»
15 years 3 months ago
CMOS flash analog-to-digital converter for high speed and low voltage applications
A CMOS flash analog-to-digital converter (ADC) designed for high speed and low voltage is presented. Using the Threshold Inverter Quantization (TIQ) comparator technique, a flas...
Jincheol Yoo, Kyusun Choi, Jahan Ghaznavi
CDES
2006
91views Hardware» more  CDES 2006»
14 years 11 months ago
Survey and Evaluation of Low-Power Flip-Flops
We survey a set of flip-flops designed for low power and high performance. We highlight the basic features of these flip-flops and evaluate them based on timing characteristics, po...
Ahmed Sayed, Hussain Al-Asaad
CASES
2004
ACM
15 years 3 months ago
A low power architecture for embedded perception
Recognizing speech, gestures, and visual features are important interface capabilities for future embedded mobile systems. Unfortunately, the real-time performance requirements of...
Binu K. Mathew, Al Davis, Michael Parker
GLOBECOM
2007
IEEE
15 years 4 months ago
Performance Analysis of V-BLAST with Optimum Power Allocation
—Comprehensive performance analysis of the unordered V-BLAST algorithm with various power allocation strategies is presented, which makes use of analytical tools and resorts to M...
Victoria Kostina, Sergey Loyka
GLVLSI
2003
IEEE
185views VLSI» more  GLVLSI 2003»
15 years 3 months ago
Noise tolerant low voltage XOR-XNOR for fast arithmetic
With scaling down to deep submicron and nanometer technologies, noise immunity is becoming a metric of the same importance as power, speed, and area. Smaller feature sizes, low vo...
Mohamed A. Elgamel, Sumeer Goel, Magdy A. Bayoumi