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» A low power high performance switched-current multiplier
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FPL
2005
Springer
103views Hardware» more  FPL 2005»
15 years 3 months ago
Low Power Domain-Specific Reconfigurable Array for Discrete Wavelet Transforms Targeting Multimedia Applications
Domain-specific heterogeneous reconfigurable arrays provide high performance over generic Field Programmable Gate Arrays (FPGAs) while maintaining the flexibility for that particu...
Sajid Baloch, Imran Ahmed, Tughrul Arslan, Adrian ...
ISVLSI
2008
IEEE
149views VLSI» more  ISVLSI 2008»
15 years 4 months ago
Uncriticality-Directed Low-Power Instruction Scheduling
Intelligent mobile information devices require lowpower and high-performance processors. In order to reduce energy consumption with maintaining computing performance, we proposed ...
Shingo Watanabe, Toshinori Sato
BSN
2009
IEEE
141views Sensor Networks» more  BSN 2009»
15 years 5 months ago
Low-Complexity, High-Throughput Multiple-Access Wireless Protocol for Body Sensor Networks
Wireless systems that form a body-area network must be made small and low power without sacrificing performance. To achieve high-throughput communication in low-cost wireless bod...
Seung-mok Yoo, Chong-Jing Chen, Pai H. Chou
ASPDAC
2006
ACM
110views Hardware» more  ASPDAC 2006»
15 years 4 months ago
Switching-activity driven gate sizing and Vth assignment for low power design
Power consumption has gained much saliency in circuit design recently. One design problem is modelled as ”Under a timing constraint, to minimize power as much as possible”. Pr...
Yu-Hui Huang, Po-Yuan Chen, TingTing Hwang
DAC
1999
ACM
15 years 2 months ago
Synthesis of Low Power CMOS VLSI Circuits Using Dual Supply Voltages
Dynamic power consumed in CMOS gates goes down quadratically with the supply voltage. By maintaining a high supply voltage for gates on the critical path and by using a low supply...
Vijay Sundararajan, Keshab K. Parhi