444 search results - page 27 / 89 » A low power high performance switched-current multiplier |
VTC
2007
IEEE
15 years 4 months ago
2007
IEEE
Abstract— We analyze the performance of multiple-input multiple-output (MIMO) systems employing orthogonal space-time block codes (STBC) in general Nakagami-m fading channels wit...
TC
2008
14 years 10 months ago
2008
On-chip interconnection networks (OCINs) have emerged as a modular and scalable solution for wire delay constraints in deep submicron VLSI design. OCIN research has shown that the ...
103
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INFOCOM
2007
IEEE
15 years 4 months ago
2007
IEEE
— In this work, we study the problem of minimizing the total power consumption in a multi-hop wireless network subject to a given offered load. It is well-known that the total po...
ICCD
2003
IEEE
15 years 7 months ago
2003
IEEE
- This paper presents a precomputation-based guarding technique to reduce both dynamic and static power consumptions in CMOS VLSI circuits. More precisely, a high threshold sleep t...
95
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FCCM
2006
IEEE
15 years 4 months ago
2006
IEEE
FPGAs are becoming more and more attractive for high precision scientific computations. One of the main problems in efficient resource utilization is the quadratically growing r...