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» A low power high performance switched-current multiplier
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95
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DAC
2003
ACM
15 years 11 months ago
Pushing ASIC performance in a power envelope
Power dissipation is becoming the most challenging design constraint in nanometer technologies. Among various design implementation schemes, standard cell ASICs offer the best pow...
Ruchir Puri, Leon Stok, John M. Cohn, David S. Kun...
106
Voted
ISVLSI
2002
IEEE
174views VLSI» more  ISVLSI 2002»
15 years 3 months ago
Optimal Supply and Threshold Scaling for Subthreshold CMOS Circuits
With technology scaling, power supply and threshold voltage continue to decrease to satisfy high performance and low power requirements. In the past, subthreshold CMOS circuits ha...
Alice Wang, Anantha Chandrakasan, Stephen V. Koson...
ICCD
2001
IEEE
110views Hardware» more  ICCD 2001»
15 years 7 months ago
Low-Energy DSP Code Generation Using a Genetic Algorithm
This paper deals with low-energy code generation for a highly optimized digital signal processor designed for mobile communication applications. We present a genetic algorithm bas...
Markus Lorenz, Rainer Leupers, Peter Marwedel, Tho...
DATE
2007
IEEE
74views Hardware» more  DATE 2007»
15 years 4 months ago
Joint consideration of fault-tolerance, energy-efficiency and performance in on-chip networks
High reliability against noise, low energy consumption and high performance are key objectives in the design of on-chip networks. Recently some researchers have considered the var...
Alireza Ejlali, Bashir M. Al-Hashimi, Paul M. Rosi...
ICIP
2010
IEEE
14 years 8 months ago
A hybrid fusion method of fingerprint identification for high security applications
Though fingerprint identification is widely used now, its imperfect performance for some high security applications, such as ATM, the access control of nuclear power stations and ...
Yilong Yin, Yanbin Ning, Zhiguo Yang