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» A low power high performance switched-current multiplier
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98
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ISCAS
2006
IEEE
119views Hardware» more  ISCAS 2006»
15 years 4 months ago
Scheduling and binding for low gate leakage nanoCMOS datapath circuit synthesis
In this paper we present two polynomial time-complexity heuristic algorithms for optimization of gate-oxide leakage (tunneling current) during behavioral synthesis through simulta...
Saraju P. Mohanty, Elias Kougianos, Ramakrishna Ve...
ISLPED
2009
ACM
132views Hardware» more  ISLPED 2009»
15 years 4 months ago
Enabling ultra low voltage system operation by tolerating on-chip cache failures
Extreme technology integration in the sub-micron regime comes with a rapid rise in heat dissipation and power density for modern processors. Dynamic voltage scaling is a widely us...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...
99
Voted
VLSID
2003
IEEE
92views VLSI» more  VLSID 2003»
15 years 10 months ago
Energy Efficient Scheduling for Datapath Synthesis
In this paper, we describe two new algorithms for datapath scheduling which aim at energy reduction while maintaining performance. The proposed algorithms, time constrained and re...
Saraju P. Mohanty, N. Ranganathan
86
Voted
IJRR
2006
171views more  IJRR 2006»
14 years 10 months ago
The Cobotic Hand Controller: Design, Control and Performance of a Novel Haptic Display
We examine the design, control and performance of the Cobotic Hand Controller, a novel, six-degree-of-freedom, admittance controlled haptic display. A highly geared admittance arch...
Eric L. Faulring, J. Edward Colgate, Michael A. Pe...
CONIELECOMP
2006
IEEE
15 years 4 months ago
Micromachined Transmission Lines for Millimeter-Wave Applications
Several different fabrication techniques and materials have been proposed for making low loss high performance micromachined transmission lines. In this paper a review of several ...
Ignacio Llamas-Garro, Alonso Corona-Chavez