444 search results - page 43 / 89 » A low power high performance switched-current multiplier |
117
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GLVLSI
2007
IEEE
15 years 3 months ago
2007
IEEE
We present a vector selection methodology for estimating the peak power dissipation in a CMOS logic circuit. The ultimate goal is to combine the speed of RT-level simulation with ...
DATE
2006
IEEE
15 years 8 months ago
2006
IEEE
Power distribution and signal transmission are becoming key limiters for chip performance in nanometer era. These issues can be simultaneously addressed by designing transmission ...
125
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VTC
2007
IEEE
15 years 8 months ago
2007
IEEE
Abstract— Discrete power allocation strategies for amplifyand-forward cooperative networks are proposed based on selective relaying methods. The goal of power allocation is to ma...
ISCA
2007
IEEE
15 years 8 months ago
2007
IEEE
The peak power consumption of hardware components affects their power supply, packaging, and cooling requirements. When the peak power consumption is high, the hardware components...
116
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ASYNC
2005
IEEE
15 years 7 months ago
2005
IEEE
Unprotected cryptographic hardware is vulnerable to a side-channel attack known as Differential Power Analysis (DPA). This attack exploits data-dependent power consumption of a co...