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» A low power high performance switched-current multiplier
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105
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CASES
2007
ACM
15 years 2 months ago
Application driven embedded system design: a face recognition case study
The key to increasing performance without a commensurate increase in power consumption in modern processors lies in increasing both parallelism and core specialization. Core speci...
Karthik Ramani, Al Davis
IPPS
2003
IEEE
15 years 3 months ago
A Novel Design Technology for Next Generation Ubiquitous Computing Architecture
Modern applications for mobile computing require high performance architectures. On the other hand, there are restrictions such as storage or power consumption. The use of recon...
Carsten Nitsch, Camillo Lara, Udo Kebschull
83
Voted
DAC
1994
ACM
15 years 2 months ago
A Modular Partitioning Approach for Asynchronous Circuit Synthesis
Asynchronous circuits are crucial in designing low power and high performance digital systems. In this paper, we present an ecient modular partitioning approach for asynchronous c...
Ruchir Puri, Jun Gu
ISLPED
2005
ACM
122views Hardware» more  ISLPED 2005»
15 years 3 months ago
A simple mechanism to adapt leakage-control policies to temperature
Leakage power reduction in cache memories continues to be a critical area of research because of the promise of a significant pay-off. Various techniques have been developed so fa...
Stefanos Kaxiras, Polychronis Xekalakis, Georgios ...
82
Voted
ICCS
2009
Springer
15 years 4 months ago
GPU Accelerated RNA Folding Algorithm
Many bioinformatics studies require the analysis of RNA or DNA structures. More specifically, extensive work is done to elaborate efficient algorithms able to predict the 2-D fold...
Guillaume Rizk, Dominique Lavenier