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DATE
2007
IEEE
88views Hardware» more  DATE 2007»
15 years 4 months ago
Trade-off design of analog circuits using goal attainment and "Wave Front" sequential quadratic programming
One of the main tasks in analog design is the sizing of the circuit parameters, such as transistor lengths and widths, in order to obtain optimal circuit performances, such as hig...
Daniel Mueller, Helmut E. Graeb, Ulf Schlichtmann
71
Voted
APCSAC
2005
IEEE
15 years 3 months ago
The Challenges of Massive On-Chip Concurrency
Moore’s law describes the growth in on-chip transistor density, which doubles every 18 to 24 months and looks set to continue for at least a decade and possibly longer. This grow...
Kostas Bousias, Chris R. Jesshope
ISLPED
1995
ACM
112views Hardware» more  ISLPED 1995»
15 years 1 months ago
Ultra-low-power analog associative memory core using flash-EEPROM-based programmable capacitors
Analog techniques can lead to ultra-efficient computational systems when applied to the right applications. The problem of associative memory is well suited to array-based analog ...
Alan Kramer, Roberto Canegallo, Mauro Chinosi, D. ...
JSAC
2007
108views more  JSAC 2007»
14 years 10 months ago
Optimal relay functionality for SNR maximization in memoryless relay networks
We explore the SNR-optimal relay functionality in a memoryless relay network, i.e. a network where, during each channel use, the signal transmitted by a relay depends only on the ...
Krishna Srikanth Gomadam, Syed Ali Jafar
BMCBI
2010
161views more  BMCBI 2010»
14 years 7 months ago
LTC: a novel algorithm to improve the efficiency of contig assembly for physical mapping in complex genomes
Background: Physical maps are the substrate of genome sequencing and map-based cloning and their construction relies on the accurate assembly of BAC clones into large contigs that...
Zeev Frenkel, Etienne Paux, David I. Mester, Cathe...