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FCCM
1998
IEEE
169views VLSI» more  FCCM 1998»
15 years 2 months ago
Scalable Network Based FPGA Accelerators for an Automatic Target Recognition Application
Abstract Image processing, specifically Automatic Target Recognition (ATR) in Synthetic Aperture Radar (SAR) imagery, is an application area that can require tremendous processing ...
Ruth Sivilotti, Young Cho, Wen-King Su, Danny Cohe...
CSCW
2006
ACM
15 years 4 months ago
Response times in N-user replicated, centralized, and proximity-based hybrid collaboration architectures
We evaluate response times, in N-user collaborations, of the popular centralized (client-server) and replicated (peer-to-peer) architectures, and a hybrid architecture in which ea...
Sasa Junuzovic, Prasun Dewan
ISPASS
2003
IEEE
15 years 3 months ago
Accelerating private-key cryptography via multithreading on symmetric multiprocessors
Achieving high performance in cryptographic processing is important due to the increasing connectivity among today’s computers. Despite steady improvements in microprocessor and...
Praveen Dongara, T. N. Vijaykumar
IOPADS
1996
100views more  IOPADS 1996»
14 years 11 months ago
ENWRICH a Compute-Processor Write Caching Scheme for Parallel File Systems
Many parallel scientific applications need high-performance I/O. Unfortunately, end-to-end parallel-I/O performance has not been able to keep up with substantial improvements in p...
Apratim Purakayastha, Carla Schlatter Ellis, David...
VLSID
2005
IEEE
87views VLSI» more  VLSID 2005»
15 years 10 months ago
Synthesis of Asynchronous Circuits Using Early Data Validity
Interest in asynchronous circuit design is increasing due to its promise of efficient designs. The quiescent nature of asynchronous circuits allows them to remain in a stable stat...
Nitin Gupta, Doug A. Edwards