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» A low-complexity issue logic
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103
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CODES
2008
IEEE
15 years 7 months ago
Distributed flit-buffer flow control for networks-on-chip
The combination of flit-buffer flow control methods and latency-insensitive protocols is an effective solution for networks-on-chip (NoC). Since they both rely on backpressure...
Nicola Concer, Michele Petracca, Luca P. Carloni
ICCSA
2004
Springer
15 years 5 months ago
A Reduced Codification for the Logical Representation of Job Shop Scheduling Problems
Abstract. This paper presents the Job Shop Scheduling Problem (JSSP) represented as the well known Satisfiabilty Problem (SAT). Even though the representation of JSSP in SAT is not...
Juan Frausto Solís, Marco Antonio Cruz-Chav...
72
Voted
ISQED
2003
IEEE
303views Hardware» more  ISQED 2003»
15 years 5 months ago
Design and Analysis of Low-Voltage Current-Mode Logic Buffers
- This paper investigates important problems involved in the design of a CML buffer as well as a chain of tapered CML buffers. A new design procedure to systematically design a cha...
Payam Heydari
90
Voted
HICSS
2002
IEEE
126views Biometrics» more  HICSS 2002»
15 years 5 months ago
Development of a Decision Logic to Support Group Improvisation: An Application to Emergency Response
This paper reviews recent progress in the development of a computer-based system for supporting improvised group decision making in risky, time-constrained situations. One goal of...
David Mendonça, William A. Wallace
87
Voted
FPGA
1995
ACM
116views FPGA» more  FPGA 1995»
15 years 4 months ago
Logic Partition Orderings for Multi-FPGA Systems
One of the critical issues for multi-FPGA systems is developing software tools for automatically mapping circuits. In this paper we consider one step in this process, partitioning...
Scott Hauck, Gaetano Borriello