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» A method proposal for architectural reliability evaluation
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CODES
2009
IEEE
15 years 2 months ago
Native MPSoC co-simulation environment for software performance estimation
Performance estimation of Multi-Processor System-On-Chip (MPa high abstraction level is required in order to perform early architecture exploration and accurate design validations...
Patrice Gerin, Mian Muhammad Hamayun, Fréd&...
87
Voted
DATE
2006
IEEE
123views Hardware» more  DATE 2006»
15 years 3 months ago
Constructing portable compiled instruction-set simulators: an ADL-driven approach
Instruction set simulators are common tools used for the development of new architectures and embedded software among countless other functions. This paper presents a framework th...
Joseph D'Errico, Wei Qin
FPL
2009
Springer
154views Hardware» more  FPL 2009»
15 years 2 months ago
Compiler assisted runtime task scheduling on a reconfigurable computer
Multitasking reconfigurable computers with one or more reconfigurable processors are being used increasingly during the past few years. One of the major challenges in such systems...
Mojtaba Sabeghi, Vlad Mihai Sima, Koen Bertels
SIGMETRICS
2000
ACM
111views Hardware» more  SIGMETRICS 2000»
14 years 9 months ago
AMVA techniques for high service time variability
Motivated by experience gained during the validation of a recent Approximate Mean Value Analysis (AMVA) model of modern shared memory architectures, this paper re-examines the &qu...
Derek L. Eager, Daniel J. Sorin, Mary K. Vernon
TDP
2010
189views more  TDP 2010»
14 years 4 months ago
The PROBE Framework for the Personalized Cloaking of Private Locations
The widespread adoption of location-based services (LBS) raises increasing concerns for the protection of personal location information. A common strategy, referred to as obfuscati...
Maria Luisa Damiani, Elisa Bertino, Claudio Silves...