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» A neurodynamical model for working memory
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ICCAD
2008
IEEE
125views Hardware» more  ICCAD 2008»
15 years 6 months ago
A succinct memory model for automated design debugging
— In today’s complex SoC designs, verification and debugging are becoming ever more crucial and increasingly timeconsuming tasks. The prevalence of embedded memories adds to t...
Brian Keng, Hratch Mangassarian, Andreas G. Veneri...
ISQED
2010
IEEE
126views Hardware» more  ISQED 2010»
14 years 11 months ago
Modeling and verification of industrial flash memories
We present a method to abstract, formalize, and verify industrial flash memory implementations. Flash memories contain specialized transistors, e.g., floating gate and split gate d...
Sandip Ray, Jayanta Bhadra, Thomas Portlock, Ronal...
PODS
2007
ACM
108views Database» more  PODS 2007»
15 years 9 months ago
Machine models and lower bounds for query processing
This paper gives an overview of recent work on machine models for processing massive amounts of data. The main focus is on generalizations of the classical data stream model where...
Nicole Schweikardt
DSN
2006
IEEE
15 years 3 months ago
Dynamic Verification of Memory Consistency in Cache-Coherent Multithreaded Computer Architectures
—Multithreaded servers with cache-coherent shared memory are the dominant type of machines used to run critical network services and database management systems. To achieve the h...
Albert Meixner, Daniel J. Sorin
DIAGRAMS
2000
Springer
15 years 1 months ago
Capacity Limits in Diagrammatic Reasoning
This paper examines capacity limits in mental animation of static diagrams of mechanical systems and interprets these limits within current theories of working memory. I review emp...
Mary Hegarty