19 search results - page 4 / 4 » A new approach to simultaneous buffer insertion and wire siz... |
ISQED
2007
IEEE
14 years 16 days ago
2007
IEEE
We present a novel technique to exploit the power-performance tradeoff. The technique can be used stand-alone or in conjunction with dynamic voltage scaling, the mainstream techn...
DATE
2003
IEEE
13 years 11 months ago
2003
IEEE
Interconnect delay dominates system delay in modern circuits, and with reduced feature sizes, coupling capacitance and signal crosstalk have become significant issues. By spacing...
DATE
1998
IEEE
13 years 10 months ago
1998
IEEE
Interconnect tuning is an increasingly critical degree of freedom in the physical design of high-performance VLSI systems. By interconnect tuning, we refer to the selection of lin...
ALGORITHMICA
2002
13 years 6 months ago
2002
In recent years there has been an upsurge of interest in spatial databases. A major issue is how to manipulate efficiently massive amounts of spatial data stored on disk in multidi...