22 search results - page 4 / 5 » A new efficient approach to statistical delay modeling of CM... |
ICCAD
2003
IEEE
14 years 3 months ago
2003
IEEE
Static timing analysis is a critical step in design of any digital integrated circuit. Technology and design trends have led to significant increase in environmental and process v...
PATMOS
2007
Springer
14 years 15 days ago
2007
Springer
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...
ASPDAC
2006
ACM
14 years 11 days ago
2006
ACM
As technology scales down, timing verification of digital integrated circuits becomes an increasingly challenging task due to the gate and wire variability. Therefore, statistical...
DATE
1998
IEEE
13 years 10 months ago
1998
IEEE
A new approach to mixed-signal circuit interfacing based on fuzzy logic models is presented. Due to their continuous rather than discrete character, fuzzy logic models offer a sig...
ISCAS
2005
IEEE
13 years 12 months ago
2005
IEEE
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...