252 search results - page 15 / 51 » A novel high throughput reconfigurable FPGA architecture |
ASAP
2007
IEEE
15 years 4 months ago
2007
IEEE
In this paper, we present and analyze a novel decoder architecture for LDPC convolutional codes (LDPCCCs). The proposed architecture enables high throughput and can be programmed ...
DFT
1999
IEEE
15 years 1 months ago
1999
IEEE
The inherent redundancy and in-the-field reconfiguration capabilities of field programmable gate arrays (FPGAs) provide alternatives to integrated circuit redundancy-based fault r...
120
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ICES
2010
Springer
14 years 7 months ago
2010
Springer
Recently, a reconfigurable and biologically inspired paradigm based on network-on-chip (NoC) and spiking neural networks (SNNs) has been proposed as a new method of realising an ef...
VLSID
2010
IEEE
14 years 7 months ago
2010
IEEE
This paper introduces a reconfigurable architecture for ensuring secure and real-time video delivery through a novel parameterized construction of the Discrete Wavelet Transform (D...
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FPL
2006
Springer
15 years 1 months ago
2006
Springer
High-performance document clustering systems enable similar documents to automatically self-organize into groups. In the past, the large amount of computational time needed to clu...