252 search results - page 23 / 51 » A novel high throughput reconfigurable FPGA architecture |
121
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BIBE
2007
IEEE
15 years 3 months ago
2007
IEEE
In this paper we describe our design and characterization of a co-processor architecture to accelerate median-based phylogenetic reconstruction for generearrangement data. Our curr...
DATE
2009
IEEE
15 years 8 months ago
2009
IEEE
- Parallel architectures have become an increasingly popular method in which to achieve high performance with low power consumption. In order to leverage these benefits, applicatio...
127
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CVPR
1998
IEEE
16 years 3 months ago
1998
IEEE
We have designed and implemented a system for real-time detection of 2-D features on a reconfigurable computer based on Field Programmable Gate Arrays (FPGA `s). We envision this ...
115
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DDECS
2008
IEEE
15 years 8 months ago
2008
IEEE
—A new FPGA implementation for adaptive median filters is proposed. Adaptive median filters exhibit better filtering properties than standard median filters; however, their i...
173
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HPDC
1998
IEEE
15 years 6 months ago
1998
IEEE
Conventional resource management systems use a system model to describe resources and a centralized scheduler to control their allocation. We argue that this paradigm does not ada...