6129 search results - page 102 / 1226 » A parallel LLL algorithm |
153
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HIPC
2004
Springer
15 years 10 months ago
2004
Springer
Parasitic extraction techniques are used to estimate signal delay in VLSI chips. Inductance extraction is a critical component of the parasitic extraction process in which on-chip ...
160
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PSB
2001
15 years 6 months ago
2001
This paper discusses the issues involved in implementing a dynamic programming algorithm for biological sequence comparison on a generalpurpose parallel computing platform based o...
162
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CPHYSICS
2008
15 years 5 months ago
2008
A scalable parallel algorithm has been designed to perform multimillion-atom molecular dynamics (MD) simulations, in which first principlesbased reactive force fields (ReaxFF) des...
156
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ISCAS
2011
IEEE
14 years 8 months ago
2011
IEEE
—We propose a multi-layer parallel decoding algorithm and VLSI architecture for decoding of structured quasi-cyclic low-density parity-check codes. In the conventional layered de...
141
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ICPP
2009
IEEE
15 years 11 months ago
2009
IEEE
Abstract—We present LeWI: a novel load balancing algorithm, that can balance applications with very different patterns of imbalance. Our algorithm can balance fine grain imbalan...