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117
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FCCM
2009
IEEE
190views VLSI» more  FCCM 2009»
15 years 9 months ago
Optical Flow on the Ambric Massively Parallel Processor Array (MPPA)
The Ambric Massively Parallel Processor Array (MPPA) is a device that contains 336 32-bit RISC processors and is appropriate for embedded systems due to its relatively small physi...
Brad L. Hutchings, Brent E. Nelson, Stephen West, ...
PDP
2008
IEEE
15 years 9 months ago
QoS-constrained List Scheduling Heuristics for Parallel Applications on Grids
This paper presents QLSE (QoS-constrained List Scheduling hEuristics), a Quality of Service-based launch time scheduling algorithm for wide area Grids. QLSE considers applications...
Nicola Tonellotto, Ranieri Baraglia, Renato Ferrin...
120
Voted
HPCC
2007
Springer
15 years 8 months ago
Parallel Database Sort and Join Operations Revisited on Grids
Based on the renowned method of Bitton et al. (see [1]) we develop a concise but comprehensive analytical model for the well-known Binary Merge Sort, Bitonic Sort, Nested-Loop Join...
Werner Mach, Erich Schikuta
EUROPAR
2004
Springer
15 years 8 months ago
Task-Queue Based Hybrid Parallelism: A Case Study
Abstract. In this paper we report on our experiences with hybrid parallelism in PARDISO, a high-performance sparse linear solver. We start with the OpenMP-parallel numerical factor...
Karl Fürlinger, Olaf Schenk, Michael Hagemann
121
Voted
ICCS
2004
Springer
15 years 8 months ago
Evaluating the Performance of Skeleton-Based High Level Parallel Programs
We show in this paper how to evaluate the performance of skeleton-based high level parallel programs. Since many applications follow some commonly used algorithmic skeletons, we id...
Anne Benoit, Murray Cole, Stephen Gilmore, Jane Hi...