We describe an incomplete but sound and efficient livelock freedom test for infinite state asynchronous reactive systems. The method s a system into a set of simple control flow cy...
The quality and the correctness of software is often the greatest concern in electronic systems. Formal verification tools can provide a guarantee that a design is free of specific...
Vijay D'Silva, Daniel Kroening, Georg Weissenbache...
Efficient techniques for the manipulation of Binary Decision Diagrams (BDDs) are key to the success of formal verification tools. Recent advances in reachability analysis and mode...
Kavita Ravi, Kenneth L. McMillan, Thomas R. Shiple...
This paper describes a feasibility study into the use of a formal requirements modeling method (SCR) to assist with Independent Verification and Validation of change requests for ...
This text is dedicated to modelling of real-time applications running under multitasking operating system. Theoretical background is based on timed automata by Alur and Dill. As th...