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IISWC
2008
IEEE
16 years 8 days ago
Accelerating multi-core processor design space evaluation using automatic multi-threaded workload synthesis
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
Clay Hughes, Tao Li
DATE
2007
IEEE
95views Hardware» more  DATE 2007»
16 years 6 days ago
Memory bank aware dynamic loop scheduling
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied i...
Mahmut T. Kandemir, Taylan Yemliha, Seung Woo Son,...
ICC
2007
IEEE
108views Communications» more  ICC 2007»
16 years 6 days ago
Flow Management for SIP Application Servers
—In this paper, we study how to build a front-end flow management system for SIP application servers. This is challenging because of some special characteristics of SIP and SIP a...
Jing Sun, Jinfeng Hu, Ruixiong Tian, Bo Yang
ISCA
2007
IEEE
168views Hardware» more  ISCA 2007»
16 years 5 days ago
Limiting the power consumption of main memory
The peak power consumption of hardware components affects their power supply, packaging, and cooling requirements. When the peak power consumption is high, the hardware components...
Bruno Diniz, Dorgival Olavo Guedes Neto, Wagner Me...
CLEF
2007
Springer
16 years 1 days ago
MIRACLE at ImageCLEFphoto 2007: Evaluation of Merging Strategies for Multilingual and Multimedia Information Retrieval
This paper describes the participation of MIRACLE research consortium at the ImageCLEF Photographic Retrieval task of ImageCLEF 2007. For this campaign, the main purpose of our ex...
Julio Villena-Román, Sara Lana-Serrano, Jos...