29 search results - page 1 / 6 » A programmable built-in self-test core for embedded memories |
DFT
2009
IEEE
14 years 1 months ago
2009
IEEE
This paper presents the first implementation of Built-In Self-Test (BIST) of Field Programmable Gate Arrays (FPGAs) using a soft core embedded processor for reconfiguration of the...
CSREAESA
2009
13 years 7 months ago
2009
A Built-In Self-Test (BIST) approach is presented for the Internal Configuration Access Port (ICAP) and Frame Error Correcting Code (ECC) logic cores embedded in Xilinx Virtex-4 an...
CSREAESA
2006
13 years 7 months ago
2006
Abstract
DATE
1999
IEEE
13 years 10 months ago
1999
IEEE
The design and architectures of a microcode-based memory BIST and programmable FSM-based memory BIST unit are presented. The proposed microcode-based memory BIST unit is more e ci...
ATS
2003
IEEE
13 years 10 months ago
2003
IEEE
We propose an embedded processor-based built-in self-repair (BISR) design for embedded memories. In the proposed design we reuse the embedded processor that can be found on almost...