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DATE
2004
IEEE
129views Hardware» more  DATE 2004»
15 years 1 months ago
Cost-Performance Trade-Offs in Networks on Chip: A Simulation-Based Approach
A challenge facing designers of systems on chip (SoC) containing networks on chip (NoC) is to find NoC instances that balance the cost (e.g. area) and performance (e.g. latency an...
Santiago González Pestana, Edwin Rijpkema, ...
DEXA
2004
Springer
112views Database» more  DEXA 2004»
15 years 1 months ago
Efficient Algorithms for Multi-file Caching
Multi-File Caching issues arise in applications where a set of jobs are processed and each job requests one or more input files. A given job can only be started if all its input fi...
Ekow J. Otoo, Doron Rotem, Sridhar Seshadri
FASE
2006
Springer
15 years 1 months ago
Formal Simulation and Analysis of the CASH Scheduling Algorithm in Real-Time Maude
This paper describes the application of the Real-Time Maude tool to the formal specification and analysis of the CASH scheduling algorithm and its suggested modifications. The CASH...
Peter Csaba Ölveczky, Marco Caccamo
PACS
2000
Springer
118views Hardware» more  PACS 2000»
15 years 1 months ago
Ramp Up/Down Functional Unit to Reduce Step Power
Because the inductive noise Ldi/dt is induced by the power change and can have disastrous impact on the timing and reliability of the system, high-performance CPU designs are more ...
Zhenyu Tang, Norman Chang, Shen Lin, Weize Xie, O....
JSSPP
1995
Springer
15 years 1 months ago
Time Space Sharing Scheduling and Architectural Support
In this paper, we describe a new job scheduling class, called \Time Space Sharing Scheduling" (TSSS) for dynamically partitionable parallel machines. As an instance of TSSS, ...
Atsushi Hori, Takashi Yokota, Yutaka Ishikawa, Shu...