Two classic categories of models exist for computer networks: network information flow and network of queues. The network information flow model appropriately captures the multi-ho...
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
Jeffrey Stuecheli, Dimitris Kaseridis, David Daly,...
In a M/M/N+M queue, when there are many customers waiting, it may be preferable to reject a new arrival rather than risk that arrival later abandoning without receiving service. O...
Abstract—Path computation elements (PCE’s) are used to compute end-to-end paths across multiple areas. Multiple PCE’s may be dedicated to each area to provide sufficient path...
Juanjuan Yu, Yue He, Kai Wu, Marco Tacca, Andrea F...