In traditional call admission control (CAC) schemes, mobile users are always the passive roles during the admission procedures and the base station determines whether to admit o...
Current integration trends embrace the prosperity of single-chip multi-core processors. Although multi-core processors deliver significantly improved system throughput, single-thr...
The fast growth in airline passenger traffic combined with the slow growth in airport capacity worldwide is putting a severe strain on the capability of airlines to adapt their pr...
Jane L. Snowdon, Soad El-Taji, Mario Montevecchi, ...
This paper proposes a high-performance scalable quality-of-service (QoS)-aware memory controller for the packet memory where packet data are stored in network routers. A major chal...
As the performance gap between processors and memory systems increases, the CPU spends more time stalled waiting for data from main memory. Critical long latency instructions, suc...
Nikil Mehta, Brian Singer, R. Iris Bahar, Michael ...