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IWANN
2005
Springer
15 years 2 months ago
2005
Springer
This presentation has two goals: (i) to review the recently suggested concept of bio-inspired CrossNet architectures for future hybrid CMOL VLSI circuits and (ii) to present new re...
ICCAD
2005
IEEE
15 years 6 months ago
2005
IEEE
Abstract— Physics offers several active devices with nanometerscale footprint, which can be best used in combination with a CMOS subsystem. Such hybrid circuits offer the potenti...
VLSID
2007
IEEE
15 years 9 months ago
2007
IEEE
As technology scales to 40nm and beyond, intra-die process variability will cause large delay and leakage variations across a chip in addition to expected die-to-die variations. I...
DATE
2010
IEEE
15 years 2 months ago
2010
IEEE
— The paper introduces novel field programmable gate array (FPGA) circuits based on hybrid CMOS/resistive switching device (memristor) technology and explores several logic archi...
ISVLSI
2008
IEEE
15 years 3 months ago
2008
IEEE
A new hybrid CMOS-nanoscale circuit style has been developed that uses only one type of Field Effect Transistor (FET) in the logic portions of a design. This is enabled by CMOS pro...