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» A reconfigurable multi-function computing cache architecture
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ISCAS
1995
IEEE
91views Hardware» more  ISCAS 1995»
13 years 10 months ago
An FPGA Based Reconfigurable Coprocessor Board Utilizing a Mathematics of Arrays
Abstract -- Work in progress at the University of Missouri-Rolla on hardware assists for high performance computing is presented. This research consists of a novel field programmab...
W. Eatherton, J. Kelly, T. Schiefelbein, H. Pottin...
SIGMOD
2002
ACM
108views Database» more  SIGMOD 2002»
14 years 6 months ago
An adaptive peer-to-peer network for distributed caching of OLAP results
Peer-to-Peer (P2P) systems are becoming increasingly popular as they enable users to exchange digital information by participating in complex networks. Such systems are inexpensiv...
Panos Kalnis, Wee Siong Ng, Beng Chin Ooi, Dimitri...
HPCA
2009
IEEE
14 years 7 months ago
Dacota: Post-silicon validation of the memory subsystem in multi-core designs
The number of functional errors escaping design verification and being released into final silicon is growing, due to the increasing complexity and shrinking production schedules ...
Andrew DeOrio, Ilya Wagner, Valeria Bertacco