327 search results - page 21 / 66 » A reconfigurable stochastic architecture for highly reliable... |
ERSA
2006
14 years 11 months ago
2006
Reconfigurable supercomputing (RSC) combines programmable logic chips with high performance microprocessors, all communicating over a high bandwidth, low latency interconnection n...
ICPP
2008
IEEE
15 years 4 months ago
2008
IEEE
The issue queue (IQ) is a key microarchitecture structure for exploiting instruction-level and thread-level parallelism in dynamically scheduled simultaneous multithreaded (SMT) p...
PERCOM
2006
ACM
15 years 9 months ago
2006
ACM
This paper introduces MobiCare ? a novel service architecture that enables a wide range of health-related services for efficient and mobile patient care. These services include: (...
POLICY
2004
Springer
15 years 3 months ago
2004
Springer
Ad hoc networking is the basis of the future military network-centric warfare architecture. Such networks are highly dynamic in nature, as mobile ad hoc networks are formed over w...
CASES
2008
ACM
14 years 11 months ago
2008
ACM
Although CMOS feature size scaling has been the source of dramatic performance gains, it has lead to mounting reliability concerns due to increasing power densities and on-chip te...