327 search results - page 24 / 66 » A reconfigurable stochastic architecture for highly reliable... |
IFE
2010
14 years 10 months ago
2010
Power consumption has become an increasingly important constraint in high-performancecomputing systems, shifting the focus from peak performance towards improving power efficiency...
DDECS
2007
IEEE
15 years 6 months ago
2007
IEEE
– The implementation and the fault simulation technique for the highly reliable digital design using two FPGAs under a processor control is presented. Two FPGAs are used for dupl...
IPPS
2005
IEEE
15 years 5 months ago
2005
IEEE
Modern internet and telephone switches consist of numerous VLSI-circuits operating at high frequencies to handle high bandwidths. It is beyond question that such systems must cont...
101
click to vote
HPCA
2009
IEEE
16 years 8 days ago
2009
IEEE
Cache hierarchies in future many-core processors are expected to grow in size and contribute a large fraction of overall processor power and performance. In this paper, we postula...
DAC
2006
ACM
15 years 3 months ago
2006
ACM
Security and reliability in processor based systems are concerns requiring adroit solutions. Security is often compromised by code injection attacks, jeopardizing even `trusted so...