327 search results - page 7 / 66 » A reconfigurable stochastic architecture for highly reliable... |
ASPDAC
2007
ACM
15 years 1 months ago
2007
ACM
- Most image processing applications are computationally intensive and data intensive. Reconfigurable hardware boards provide a convenient and flexible solution to speed up these a...
JUCS
2007
14 years 9 months ago
2007
: This article presents an architecture that encrypts data with the AES algorithm. This architecture can be implemented on the Xilinx Virtex II FPGA family, by applying pipelining ...
FDL
2003
IEEE
15 years 2 months ago
2003
IEEE
Reconfigurable Systolic Arrays are a generalization of Systolic Arrays where node operations and interconnections can be redefined even at run time. This flexibility increases the...
NIPS
2001
14 years 11 months ago
2001
A mixed-signal paradigm is presented for high-resolution parallel innerproduct computation in very high dimensions, suitable for efficient implementation of kernels in image proce...
CASES
2009
ACM
15 years 4 months ago
2009
ACM
As technology scales and the energy of computation continually approaches thermal equilibrium [1,2], parameter variations and noise levels will lead to larger error rates at vario...