34 search results - page 4 / 7 » A sample-based cache mapping scheme |
109
click to vote
ICCD
2004
IEEE
15 years 8 months ago
2004
IEEE
Existing schemes for cache energy optimization incorporate a limited degree of dynamic associativity: either direct mapped or full available associativity (say 4-way). In this pap...
EGH
2007
Springer
15 years 5 months ago
2007
Springer
Evaluating pixel shaders consumes a growing share of the computational budget for real-time applications. However, the significant temporal coherence in visible surface regions, ...
116
click to vote
TOG
2002
14 years 11 months ago
2002
In this paper, we present a system for interactive computation of global illumination in dynamic scenes. Our system uses a novel scheme for caching the results of a high quality p...
DATE
2009
IEEE
15 years 6 months ago
2009
IEEE
Abstract—With the increasing scaling of manufacturing technology, process variation is a phenomenon that has become more prevalent. As a result, in the context of Chip Multiproce...
APCSAC
2003
IEEE
15 years 5 months ago
2003
IEEE
The StrongARM processor features virtually-addressed caches and a TLB without address-space tags. A naive implementation therefore requires flushing of all CPU caches and the TLB ...