Sciweavers

359 search results - page 1 / 72
» A section cache system designed for VLIW architectures
Sort
View
81
Voted
JSA
2000
74views more  JSA 2000»
14 years 9 months ago
A section cache system designed for VLIW architectures
Won-Kee Hong, Shin-Dug Kim
ICCD
1999
IEEE
110views Hardware» more  ICCD 1999»
15 years 1 months ago
TriMedia CPU64 Architecture
We present a new VLIW core as a successor to the TriMedia TM1000. The processor is targeted for embedded use in media-processing devices like DTVs and set-top boxes. Intended as a...
Jos T. J. van Eijndhoven, Kees A. Vissers, Evert-J...
91
Voted
DSD
2007
IEEE
122views Hardware» more  DSD 2007»
15 years 3 months ago
Energy Based Design Space Exploration of Multiprocessor VLIW Architectures
Today energy is an important factor in designing a multiprocessor system. The overall goal of this work is to propose a methodology for design space exploration of VLIW multiproce...
Manoj Gupta, Mayank Gupta, Neeraj Goel, M. Balaksr...
DAC
2000
ACM
15 years 10 months ago
Code compression for low power embedded system design
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
Haris Lekatsas, Jörg Henkel, Wayne Wolf
GLVLSI
2010
IEEE
164views VLSI» more  GLVLSI 2010»
15 years 2 months ago
Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
Mohamed M. Sabry, Martino Ruggiero, Pablo Garcia D...