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» A simple optimal power flow model with energy storage
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CC
2007
Springer
126views System Software» more  CC 2007»
15 years 3 months ago
An Array Allocation Scheme for Energy Reduction in Partitioned Memory Architectures
This paper presents a compiler technique that reduces the energy consumption of the memory subsystem, for an off-chip partitioned memory architecture having multiple memory banks ...
K. Shyam, R. Govindarajan
ICASSP
2008
IEEE
15 years 4 months ago
Energy efficient change detection over a MAC using physical layer fusion
We propose a simple and energy efficient distributed Change Detection scheme for sensor networks based on Page’s parametric CUSUM algorithm. The sensor observations are IID ove...
Taposh Banerjee, Veeraruna Kavitha, Vinod Sharma
PACS
2000
Springer
110views Hardware» more  PACS 2000»
15 years 1 months ago
Compiler-Directed Dynamic Frequency and Voltage Scheduling
Dynamic voltage and frequency scaling has been identified as one of the most effective ways to reduce power dissipation. This paper discusses a compilation strategy that identifies...
Chung-Hsing Hsu, Ulrich Kremer, Michael S. Hsiao
MDM
2005
Springer
165views Communications» more  MDM 2005»
15 years 3 months ago
STEP: Self-Tuning Energy-safe Predictors
Data access prediction has been proposed as a mechanism to overcome latency lag, and more recently as a means of conserving energy in mobile systems. We present a fully adaptive p...
James Larkby-Lahet, Ganesh Santhanakrishnan, Ahmed...
ISLPED
2006
ACM
145views Hardware» more  ISLPED 2006»
15 years 3 months ago
An optimal analytical solution for processor speed control with thermal constraints
As semiconductor manufacturing technology scales to smaller device sizes, the power consumption of clocked digital ICs begins to increase. Dynamic voltage and frequency scaling (D...
Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Ch...