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CDES
2008
90views Hardware» more  CDES 2008»
15 years 6 months ago
Nanocompilation for the Cell Matrix Architecture
- The Cell Matrix Architecture is a massive array of dynamically self-configurable, uniformly connected, identical computational units. This architecture can enable efficient, prac...
Thomas Way, Rushikesh Katikar, Ch. Purushotham
FPGA
2010
ACM
294views FPGA» more  FPGA 2010»
15 years 10 months ago
Axel: a heterogeneous cluster with FPGAs and GPUs
This paper describes a heterogeneous computer cluster called Axel. Axel contains a collection of nodes; each node can include multiple types of accelerators such as FPGAs (Field P...
Kuen Hung Tsoi, Wayne Luk
HEURISTICS
2010
15 years 2 months ago
A metaheuristic approach to the urban transit routing problem
The urban transit routing problem (UTRP) is NP-Hard and involves devising routes for public transport systems. It is a highly complex multiply constrained problem and the evaluati...
Lang Fan, Christine L. Mumford
CF
2005
ACM
15 years 7 months ago
Grid result checking
Result checking is the theory and practice of proving that the result of an execution of a program on an input is correct. Result checking has most often been envisioned in the fr...
Cécile Germain-Renaud, Dephine Monnier-Raga...
ACMSE
2011
ACM
14 years 5 months ago
Targeting FPGA-based processors for an implementation-driven compiler construction course
This paper describes the adaptation of a modern compiler construction course to target an FPGA-based hardware platform used throughout our computer science curriculum. One of the ...
D. Brian Larkins, William M. Jones