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» A simulator for adaptive parallel applications
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HICSS
2006
IEEE
164views Biometrics» more  HICSS 2006»
15 years 5 months ago
A Methodology for Generating Application-Specific Heterogeneous Processor Arrays
Hardware designers are increasingly turning to Single Chip Multi-Processors to achieve power and throughput goals. To further increase performance for a specific application the c...
Stephen D. Craven, Cameron Patterson, Peter M. Ath...
GLVLSI
2003
IEEE
173views VLSI» more  GLVLSI 2003»
15 years 4 months ago
40 MHz 0.25 um CMOS embedded 1T bit-line decoupled DRAM FIFO for mixed-signal applications
An embedded 40 MHz FIFO buffer for use in mixed-signal information processing applications is presented. The buffer design uses a 1T DRAM topology for its unit memory cell compone...
Michael I. Fuller, James P. Mabry, John A. Hossack...
SNPD
2008
15 years 11 days ago
Aggregate Congestion Control for Peer-to-Peer File Sharing Applications
Peer-to-Peer file sharing applications, which enable peers to establish multiple TCP connections between other peers to transfer data, pose new challenge to congestion control. Si...
Wei Li, Shanzhi Chen, Yaning Liu, Xin Li
FUIN
2002
80views more  FUIN 2002»
14 years 10 months ago
P Systems with Replicated Rewriting and Stream X-Machines (Eilenberg Machines)
Abstract. The aim of this paper is to show how the P systems with replicated rewriting can be modeled by X-machines (also called Eilenberg machines). In the first approach, the par...
Joaquin Aguado, Tudor Balanescu, Anthony J. Cowlin...
IPPS
2000
IEEE
15 years 3 months ago
Performance of On-Chip Multiprocessors for Vision Tasks
Abstract. Computer vision is a challenging data intensive application. Currently, superscalar architectures dominate the processor marketplace. As more transistors become available...
Yongwha Chung, K. Park, W. Hahn, Neungsoo Park, Vi...