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» A static power model for architects
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DATE
2004
IEEE
145views Hardware» more  DATE 2004»
15 years 1 months ago
Hierarchical Adaptive Dynamic Power Management
Dynamic power management aims at extending battery life by switching devices to lower-power modes when there is a reduced demand for service. Static power management strategies can...
Zhiyuan Ren, Bruce H. Krogh, Radu Marculescu
75
Voted
SCAM
2002
IEEE
15 years 2 months ago
Semantics Guided Filtering of Combinatorial Graph Transformations in Declarative Equation-Based Languages
This paper concerns the use of static analysis for debugging purposes of declarative object-oriented equation-based modeling languages. We propose a framework where over- and unde...
Peter Bunus, Peter Fritzson
IEEEPACT
2006
IEEE
15 years 3 months ago
Communist, utilitarian, and capitalist cache policies on CMPs: caches as a shared resource
As chip multiprocessors (CMPs) become increasingly mainstream, architects have likewise become more interested in how best to share a cache hierarchy among multiple simultaneous t...
Lisa R. Hsu, Steven K. Reinhardt, Ravishankar R. I...
ISLPED
2009
ACM
168views Hardware» more  ISLPED 2009»
15 years 4 months ago
Low power circuit design based on heterojunction tunneling transistors (HETTs)
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, ...
DAC
2002
ACM
15 years 10 months ago
DRG-cache: a data retention gated-ground cache for low power
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
Amit Agarwal, Hai Li, Kaushik Roy