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» A stochastic approach to automated design improvement
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DFT
2003
IEEE
145views VLSI» more  DFT 2003»
15 years 5 months ago
System-Level Analysis of Fault Effects in an Automotive Environment
In the last years, new requirements in terms of vehicle performance increased significantly the amount of on-board electronics, thus raising more concern about safety and fault to...
Fulvio Corno, S. Tosato, P. Gabrielli
TVLSI
2008
124views more  TVLSI 2008»
14 years 11 months ago
A Refinement-Based Compositional Reasoning Framework for Pipelined Machine Verification
Abstract--We present a refinement-based compositional framework for showing that pipelined machines satisfy the same safety and liveness properties as their non-pipelined specifica...
Panagiotis Manolios, Sudarshan K. Srinivasan
TCAD
2010
102views more  TCAD 2010»
14 years 6 months ago
Functional Test Generation Using Efficient Property Clustering and Learning Techniques
Abstract--Functional verification is one of the major bottlenecks in system-on-chip design due to the combined effects of increasing complexity and lack of automated techniques for...
Mingsong Chen, Prabhat Mishra
80
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DAC
2005
ACM
16 years 18 days ago
Multilevel full-chip routing for the X-based architecture
As technology advances into the nanometer territory, the interconnect delay has become a first-order effect on chip performance. To handle this effect, the X-architecture has been...
Tsung-Yi Ho, Chen-Feng Chang, Yao-Wen Chang, Sao-J...
DAC
2007
ACM
16 years 19 days ago
Progressive Decomposition: A Heuristic to Structure Arithmetic Circuits
Despite the impressive progress of logic synthesis in the past decade, finding the best architecture for a given circuit still remains an open problem and largely unsolved. In mos...
Ajay K. Verma, Philip Brisk, Paolo Ienne