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» A strategy for testing hardware write block devices
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MSS
2003
IEEE
173views Hardware» more  MSS 2003»
15 years 2 months ago
Peabody: The Time Travelling Disk
Disk drives are now available with capacities on the order of hundreds of gigabytes. What has not become available is an easy way to manage storage. With installed machines locate...
Charles B. Morrey III, Dirk Grunwald
UIST
2006
ACM
15 years 3 months ago
In-stroke word completion
We present the design and implementation of a word-level stroking system called Fisch, which is intended to improve the speed of character-level unistrokes. Importantly, Fisch doe...
Jacob O. Wobbrock, Brad A. Myers, Duen Horng Chau
ISQED
2006
IEEE
118views Hardware» more  ISQED 2006»
15 years 3 months ago
Language-Based High Level Transaction Extraction on On-chip Buses
Abstract— With the increasing in silicon densities, SoC designs are the stream in modern electronics systems. Accordingly, the verification for SoC designs is crucial. One of th...
Yi-Le Huang, Chun-Yao Wang, Richard Yeh, Shih-Chie...
76
Voted
ICCD
2004
IEEE
138views Hardware» more  ICCD 2004»
15 years 6 months ago
A Novel Low-Power Scan Design Technique Using Supply Gating
— Reduction in test power is important to improve battery life in portable devices employing periodic self-test, to increase reliability of testing and to reduce test-cost. In sc...
Swarup Bhunia, Hamid Mahmoodi-Meimand, Saibal Mukh...
69
Voted
CIIA
2009
14 years 10 months ago
Physical Synthesis for CPLD Architectures
In this paper, we present a new synthesis feature namely, "Xor matching", and the foldback product term synthesis for Complex Programmable Logic Devices (CPLD) architectu...
Sid-Ahmed Senouci